Schematics/Block Diagram; Layout Notes; Passive Monochrome Single-Scan Display Typical Connection - Intel PXA27 Series Design Manual

7.5.1.2

Schematics/Block Diagram

See Figure 7-1
display. The sample connections serve as a guide for designing systems with such passive displays.
Panels differ on which is the panel's least significant bit (refer to the LCD panel reference
documentation for the least significant bit.) The figure indicates the top-left pixel (1,1) bit. While
dual-scan panels indicates the top-left pixel (1,n/2) of the upper and lower panels and color passive
panels show the top-left-pixel color bits.
Figure 7-1. Passive Monochrome Single-Scan Display Typical Connection
7.5.1.3

Layout Notes

Refer to Section 7.4, "Layout Notes,"
®
Intel PXA27x Processor Family Design Guide
for illustration of typical connections for a passive monochrome single-scan
LDD<0>
Top Left
LDD<1>
LDD<2>
LDD<3>
L_PCLK_WR
L_LCLK_A0
L_FCLK_RD
L_BIAS
for layout notes and considerations.
LCD Interface
D0
D1
D2
D3
PIXEL_CLOCK
LINE_CLOCK
FRAME_CLOCK
BIAS
II:7-7