Configuration - LAPIS Semiconductor ML62Q1000 Series User Manual

22.1.2 Configuration

The voltage level supervisor (VLS0) consists of a comparator, a sampling control circuit, and a low level detection
control circuit. Figure 22-1 shows the configuration of the VLS0.
LSCLK
HSCLK
V
DD
Data bus
Voltage level supervisor 0 control register
VLS0CON :
Voltage level supervisor 0 mode register
VLS0MOD :
Voltage level supervisor 0 level register
VLS0LV :
Voltage level supervisor 0 sampling register
VLS0SMP :
FEUL62Q1000
Comparator
Comparison
Result
Threshold
voltage
Threshold
voltage
selector
VLS0CON
VLS0MOD
VLS0LV
Figure 22-1 Configuration of Voltage Level Supervisor
Chapter 22 Voltage Level Supervisor
VLS0F
Sampling
Controller
VLS0SMP
ML62Q1000 Series User's Manual
Low level
Detection
VLS0 interrupt
Control
Circuit
VLS0 reset
22-3