LAPIS Semiconductor ML62Q1000 Series User Manual page 380

FTnRUN
Buffer for cycle
Buffer for event B
Buffer for event A
Buffer for dead time
Positive phase
Negative phase
FTnP
FTnEA
FTnEB
FTnDT
FTnUD
(1)
(2)
(3)
(4)
(5)
Figure 9-19 Update timing while the counter stops(counter value is other than 0x0000)
FEUL62Q1000
(1)
Counter
(2)
The counter stops
Update the registers while the counter stops ( counter value is other than 0x0000)
The counter operation restarts (Each buffer is not updated at this timing)
" "
Set FTCUDn bit to 1
Each buffer is updated at the start of cycle and the FTCUDn bit gets cleared
(3)
(4)
ML62Q1000 Series User's Manual
Chapter 9 Functional Timer (FTM)
(5)
Buffer for cycle
Buffer for event A
Buffer for event B
Buffer for dead time
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