LAPIS Semiconductor ML62Q1000 Series User Manual page 575

Bit Bit symbol
name
No.
10 Pn1PU
9 Pn1OE
8 Pn1IE
7 to 4 Pn0MD3 to
Pn0MD0
3 Pn0OD
2 Pn0PU
1 Pn0OE
FEUL62Q1000
This bit is used to enable the internal pull-up resistor of Pn1 pin.
The internal pull-up resistor can be enabled on following conditions of the port.
× The input is enabled and the output is disabled on the port
× The input is enabled and the N-channel open drain output is chosen on the port
0: Without a pull-up resistor (initial value)
1: With a pull-up resistor
The conditions of the port are specified by Pn1IE, Pn1OE and Pn1OD bit.
10X: Setting of Pn1PU bit is enable
111: Setting of Pn1PU bit is enable
Others: Setting of Pn1PU bit is disable
X: 0 or 1 (don't care)
This bit is used to enable the output of Pn1 pin
0: Disable the output (initial value)
1: Enable the output
This bit is used to enable the input of Pn1 pin
0: Disable the input (initial value)
1: Enable the input
This bit is used to choose the shared function of Pn0 pin.
For the details of the shared function, see Table 1-7 "ML62Q1300 Group Pin List", Table 1-8
"ML62Q1500 Group Pin List" and Table 1-9 "ML62Q1700 Group Pin List".
0000: Primary function (initial value)
nd
0001: 2
function
rd
0010: 3 function
th
0011: 4 function
th
0100: 5 function
th
0101: 6 function
th
0110: 7 function
th
0111: 8 function
1XXX: Do not use (Primary function)
X: 0 or 1 (don't care)
This bit is used choose the output type of Pn0 pin.
An LED is directly drive-able by enlarging the current when the N-channel open drain output
mode is chosen.
See the data sheet for details about the current drive ability.
0: CMOS output (initial value)
1: N-channel open drain output
This bit is used to enable the internal pull-up resistor of Pn0 pin.
The internal pull-up resistor can be enabled on following conditions of the port.
× The input is enabled and the output is disabled on the port
× The input is enabled and the N-channel open drain output is chosen on the port
0: Without a pull-up resistor (initial value)
1: With a pull-up resistor
The conditions of the port are specified by Pn0IE, Pn0OE and Pn0OD bit.
10X: Setting of Pn0PU bit is enable
111: Setting of Pn0PU bit is enable
Others: Setting of Pn0PU bit is disable
X: 0 or 1 (don't care)
This bit is used to enable the output of Pn0 pin
0: Disable the output (initial value)
1: Enable the output
ML62Q1000 Series User's Manual
Chapter 17 General Purpose Port
Description
17-16