LAPIS Semiconductor ML62Q1000 Series User Manual page 222

Bit No. Bit symbol name
1,0 ILCBUH, ILCBUL
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*1 See Chapter 29 Safety Function
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*2: See Chapter 6 Clock Generation Circuit
[Note]
Ÿ
Write to this register when the interrupt is disabled (IE0 to IE7 registers are "0x00") or the master
interrupt enable flag (MIE) is "0", otherwise, an interrupt may occur with an unexpected interrupt level.
FEUL62Q1000
This bit chooses the priority level of the Clock Backup interrupt
00: Level 1 (Priority is lowest) (initial)
01: Level 2
10: Level 3
11: Level 4 (Priority is highest)
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for more details.
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for more details.
ML62Q1000 Series User's Manual
Description
*2
Chapter 5 Interrupts
(CBUINT).
5-26