LAPIS Semiconductor ML62Q1000 Series User Manual page 361

FTnOSL1 and FTnOSL0 bits of FTnMOD register are used to choose the phase of the output signal driven to the
FTMnP/FMnN pins. FTnOSNP bit is for reversing the output to the FTMnP pin. FTnOSNN bit is for reversing the
output to the FTMnN pin.
Figure 9-4(a) shows waveforms on different conditions of the output phase to the FTMnP/FTMnN pins specified by the
FTnOSL1 and FTnOSL0 bits of the FTnMOD register.
Figure 9-4(b) shows waveforms when reversing the output to the FTMnP pin by the FTnOSNP bit and reversing the
output to the FTMNN pin by the FTnOSNN bit.
FTnP
FTnSTA
●FTnOSL1, FTnOSL0=
FTMnP
FTMnN
●FTnOSL1, FTnOSL0="01"(Initial)
FTMnP
FTMnN
●FTnOSL1, FTnOSL0=
FTMnP
FTMnN
●FTnOSL1, FTnOSL0=
FTMnP
FTMnN
FEUL62Q1000
Counter
" "
00
" "
10
" "
11
(a) Output phases specified by FTnOSL1 bit and FTnOSL0 bit
ML62Q1000 Series User's Manual
Chapter 9 Functional Timer (FTM)
(Negative phase)
(Negative phase)
(Positive phase)
(Negative phase)
(Negative phase)
(Positive phase)
(Positive phase)
(Positive phase)
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