Watchdog Timer Counter Register (Wdtmc) - LAPIS Semiconductor ML62Q1000 Series User Manual

10.2.4 Watchdog Timer Counter Register (WDTMC)

This register is a read-only special function register (SFR) to read the WDT counter value.
Address: 0xF014
Access: R
Access size: 8/16 bits
Initial value: 0x0000
15 14
Word
Byte
WDTC WDTC WDTC
Bit
15 14
R/W R R
Initial
0 0
value
Bit
Bit name
No.
15 to 0 WDTC15 to
WDTC0
[Note]
Ÿ
The count value read from the WDT counter are discontinuous due to the hardware structure.
FEUL62Q1000
13 12 11 10
WDTMCH
WDTC WDTC WDTC
13 12 11 10
R R R R
0 0 0 0
These bits are used to read the WDT counter value.
The normal counting operation of the WDT counter can be confirmed If values periodically
read from the WDT counter vary.
Read the value with a cycle slower than 1 kHz, such as low-speed time base counter
interrupt, since the WDT counter clock (WDTCLK) is approximately 1 kHz.
9 8 7 6
WDTMC
WDTC WDTC WDTC WDTC
9 8 7 6
R R R R
0 0 0 0
Description
ML62Q1000 Series User's Manual
Chapter 10 Watchdog Timer
5 4 3 2
WDTMCL
WDTC WDTC WDTC WDTC
5 4 3 2
R R R R
0 0 0 0
1 0
WDTC WDTC
1 0
R R
0 0
10-7