LAPIS Semiconductor ML62Q1000 Series User Manual page 286

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[Note]
Ÿ
A time base counter interrupt may occur depending on a write timing to the LTBINTL or LTLBINTH. See
the program example for initializing described in "7.3.1 Operation of the Low-speed Time Base Counter".
FEUL62Q1000
ML62Q1000 Series User's Manual
Chapter 7 Low Speed Time Base Counter
7-12

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