LAPIS Semiconductor ML62Q1000 Series User Manual page 235

Interrupt
source
IRQ
number
(interrupt
(priority)
request)
35 IRQ4[6]
36 IRQ4[7]
37 IRQ5[0]
38 IRQ5[1]
39 IRQ5[2]
40 IRQ5[3]
41 IRQ5[4]
42 IRQ5[5]
43 IRQ5[6]
44 IRQ5[7]
45 IRQ6[0]
46 IRQ6[1]
47 IRQ6[2]
48 IRQ6[3]
49 IRQ6[4]
50 IRQ6[5]
51 IRQ6[6]
52 IRQ6[7]
53 IRQ7[0]
54 IRQ7[1]
55 IRQ7[2]
56 IRQ7[3]
57 IRQ7[4]
58 IRQ7[5]
59 IRQ7[6]
60 (low) IRQ7[7]
[Note]
Ÿ
The watchdog timer interrupt (WDTINT) is a non-maskable interrupt. If the non-maskable interrupt
occurs while an interrupt processing is in progress, abort the interrupt processing and proceed with
processing the non-maskable interrupt preferentially regardless of multiple interrupts enabled/disabled.
Ÿ
For failsafe, define unused all interrupt vectors. If an unused interrupt occurs, it may indicate the
possibility that the CPU went out of control. It is recommended to cause the watch dog timer (WDT) reset
to occur using the infinite loop to initialize the LSI.
FEUL62Q1000
Table 5-2 List of Interrupt Sources (2/2)
Register assignment
IE
ILC (interrupt
(interrupt
level)
enable)
IE4[6] ILC4[13:12]
IE4[7] ILC4[15:14]
IE5[0] ILC5[1:0]
IE5[1] ILC5[3:2]
IE5[2] ILC5[5:4]
IE5[3] ILC5[7:6]
IE5[4] ILC5[9:8]
IE5[5] ILC5[11:10]
IE5[6] ILC5[13:12]
IE5[7] ILC5[15:14]
IE6[0] ILC6[1:0]
IE6[1] ILC6[3:2]
IE6[2] ILC6[5:4]
IE6[3] ILC6[7:6]
IE6[4] ILC6[9:8]
IE6[5] ILC6[11:10]
IE6[6] ILC6[13:12]
IE6[7] ILC6[15:14]
IE7[0] ILC7[1:0]
IE7[1] ILC7[3:2]
IE7[2] ILC7[5:4]
IE7[3] ILC7[7:6]
IE7[4] ILC7[9:8]
IE7[5] ILC7[11:10]
IE7[6] ILC7[13:12]
IE7[7] ILC7[15:14]
Interrupt External/
vector Mask internal
address source
0x004C Enabled
0x004E Enabled
0x0050 Enabled
0x0052 Enabled
Enabled
0x0054
Internal
Enabled
0x0056
0x0058 Enabled
0x005A Enabled
0x005C Enabled
0x005E Enabled
0x0060 Enabled
0x0062 Enabled
0x0064 Enabled
0x0066 Enabled
Internal
0x0068 Enabled
0x006A Enabled
0x006C Enabled
0x006E Enabled
Enabled
0x0070
Enabled
0x0072
Enabled
0x0074
0x0076 Enabled
Internal
Enabled
0x0078
Enabled
0x007A
0x007C Enabled
0x007E Enabled
ML62Q1000 Series User's Manual
Chapter 5 Interrupts
Interrupt source
16-bit timer 2 interrupt
16-bit timer 3 interrupt
Serial communication unit 20 interrupt
Serial communication unit 21 interrupt
Analogue Comparator 0
interrupt
Analogue Comparator 1
interrupt
Functional timer 4 interrupt
Functional timer 5 interrupt
16-bit timer 4 interrupt
16-bit timer 5 interrupt
Serial communication unit 30 interrupt
Serial communication unit 31 interrupt
Serial communication unit 40 interrupt
Serial communication unit 41 interrupt
Functional timer 6 interrupt
Functional timer 7 interrupt
16-bit timer 6 interrupt
16-bit timer 7 interrupt
Serial communication unit 50
interrupt
Serial communication unit 51
interrupt
Low-speed time base counter
0 interrupt
-
Low-speed time base counter
1 interrupt
Low-speed time base counter
2 interrupt
Simplified RTC interrupt
-
Interrupt
source
symbol
TM2INT
TM3INT
SIU20INT
SIU21INT
CMP0INT
CMP1INT
FTM4INT
FTM5INT
TM4INT
TM5INT
SIU30INT
SIU31INT
SIU40INT
SIU41INT
FTM6INT
FTM7INT
TM6INT
TM7INT
SIU50INT
SIU51INT
LTBC0INT
-
LTBC1INT
LTBC2INT
RTCINT
-
5-39