LAPIS Semiconductor ML62Q1000 Series User Manual page 868

Chapter 11 Serial Communication Unit
See Section 11.2.2 "Serial Communication Unit n Transmit/Receive Buffer (SDnBUF)".
[ ] In the half-duplex communication mode of UART, be sure to choose the transmission mode by setting
Un0IO and Un1IO bit of the UARTn mode register (UAn0MOD, UAn1MOD) before writing the
transmission data to SDnBUFL and SDnBUFH.
[ ] Do not perform write-operation to the SDnBUF in the SSIO slave reception mode.
See Section 11.2.3 "Serial Communication Unit n Mode Register (SUnMOD)".
[ ] Be sure to set the SUnMOD register while communication is stopped (SUnCON register = 0x00) and
do not rewrite it during communication. If it is rewritten during communication, data may be transmitted or
received incorrectly.
See Section 11.2.4 "Serial Communication Unit n Transmission Interval Setting Register (SUnDLY)".
[ ] Set "0x00" to the SUnDLYL register in the SSIO slave mode.
[ ] The SUnDLYL register is invalid in the SSIO master reception mode.
See Section 11.2.6 "Synchronous Serial Port n Mode Register (SIOnMOD)".
[ ] Be sure to set the SIO0MOD register while communication is stopped and do not rewrite it during
communication. If it is rewritten during communication, data may be transmitted or received incorrectly.
[ ] Set the S0CK4 to S0CK0 bits to 4MHz or below.
[ ] Enable the high-speed oscillation when choosing the slave mode. See Chapter 6 "Clock Generation
Circuit" for details on how to enable the high-speed oscillation.
[ ] The maximum frequency of communication clock is 1MHz in the slave mode.
See Section 11.2.7 "Synchronous Serial Port n Status Register (SIOnSTAT)".
[ ] Do not update the SnTUER, SnROER and SnTOER bits by using the bit symbol. Update them by
using a byte access, not so that unintented bits are changed by the bit access instructions.
[ ] Do not write the SnTUER, SnROER and SnTOER bits during the communication. Write them when the
communication is stopped.
See Section 11.2.8 "UARTn0 Mode Register (UAn0MOD)".
[ ] Be sure to set the UAn0MOD register while communication is stopped. Do not rewrite it during
communication. If it is rewritten during communication, data may be transmitted or received incorrectly.
See Section 11.2.9 "UARTn1 Mode Register (UAn1MOD)".
[ ] Be sure to set the UAn1MOD register while communication is stopped. Do not rewrite it during
communication. If it is rewritten during communication, data may be transmitted or received incorrectly.
See Section 11.2.11 "UARTn1 Baud Rate Register (UAn1BRT)".
[ ] Be sure to set the UAn0BRT and UAn1BRT register while communication is stopped. Do not rewrite it
during communication. If it is rewritten during communication, data may be transmitted or received
incorrectly.
See Section 11.2.13 "UARTn1 Baud Rate Adjustment Register (UAn1BRC)".
[ ] Be sure to set the UAn0BRC and UAn1BRC register while communication is stopped. Do not rewrite it
during communication. If it is rewritten during communication, data may be transmitted or received
incorrectly.
See Section 11.2.14 "UARTn0 Status Register (UAn0STAT)".
[ ] The Un0OER bit becomes "1" if the previous receive data is not read even after reception is stopped
by the Un0EN bit and restarted. Therefore, set the Un0EN bit to "1" after reading the SDnBUFL, or when
the reception is completed, be sure to read the SDnBUFL even if the data is unnecessary.
[ ] When an error occurs in the start bit, the state returns to the reception waiting state.
[ ] Do not write the Un0FER bit, Un0OER bit, Un0PER bit and Un0FUL bit by using the bit symbol. Write
them by the byte-access.
See Section 11.2.15 "UARTn1 Status Register (UAn1STAT)".
[ ] The Un1OER bit becomes "1" if the previous receive data is not read even after reception is stopped
by the Un1EN bit and restarted. Therefore, set the Un1EN bit to "1" after reading the SDnBUFH, or when
the reception is completed, be sure to read the SDnBUFH even if the data is not necessary.
FEUL62Q1000
ML62Q1000 Series User's Manual
Appendix E. List of Notes
E-9