LAPIS Semiconductor ML62Q1000 Series User Manual page 496

2
13.2.2 I C Master n Receive Register (Master) (I2MnRD: n=0,1)
I2MnRD is a read-only special function register (SFR) used to store the received data.
The I2MnRD is updated after completion of each reception.
Address: 0xF6E2(I2M0RD), 0xF6F2(I2M1RD)
Access: R
Access size: 8bit
Initial value: 0x00
15 14
Word
Byte
- -
Bit
R/W R R
Initial
0 0
value
Bit
Bit symbol
No. name
7 to 0 I2MnR7 to
I2MnR0
FEUL62Q1000
13 12 11 10
-
- - - -
R R R R
0 0 0 0
These bits are used to store the received data in the master mode.
The signal input to the I2CM0_SDA pin is received at transmission of a slave address and at
data transmission/reception in sync with the rising edge of the signal on the I2CM0_SCL pin.
Reading this register enables following confirmation.
・ Reading when receiving data: Can confirm the received data.
・ Reading slave address or Reading when transmitting data: Can confirm the transmission
data is surely transmitted.
9 8 7 6
-
I2MnR I2MnR
- -
7 6
R R R R
0 0 0 0
Description
ML62Q1000 Series User's Manual
Chapter 13 I2C Master
5 4 3 2
I2MnRD
I2MnR I2MnR I2MnR I2MnR
5 4 3 2
R R R R
0 0 0 0
1 0
I2MnR I2MnR
1 0
R R
0 0
13-5