LAPIS Semiconductor ML62Q1000 Series User Manual page 526

The following chart shows the DMA controller termination procedure.
Confirm transfer
Interrupt status
DMA interrupt
FEUL62Q1000
Start
status
clear
disable
End
Figure 14-4 DMA Termination Procedure
Confirm operation termination with the DCnISTA bit of the DSTAT
register
Write "1" to the DICLRn bit of the DICLR register
Set with the EDMA bit (EDMA="0")
ML62Q1000 Series User's Manual
Chapter 14 DMA Controller
n=0 or 1
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