LAPIS Semiconductor ML62Q1000 Series User Manual page 120

Quad word symbol
Double word symbol
Word symbol
Byte symbol
Multiplication
16 bit x 16 bit
Division
32 bit/16 bit
Division
32 bit/32 bit
Multiply-accumulate
(non-saturating)
16 bit x 16bit+32 bit
Multiply-accumulate
(saturating)
16 bit x 16bit+32 bit
As soon as the data is written in register CR7, operation is started.
In a saturating multiply-accumulate operation, the result is fixed to 0x7FFF_FFFF for a positive number and 0x8000_0000
for a negative number when it is out of the expressible range.
[Note]
Ÿ
"-" indicates that the previous value is retained.
Ÿ
In a signed operation, each of the most significant bits of input and output is a sign.
FEUL62Q1000
CXR4
CER6
CR7 CR6
Multiplicand
Input
[15:0]
Result -
Input Divisor [15:0]
Result -
Input Divisor [31:0]
Result Remainder [31:0]
Multiplicand
Input
[15:0]
Result -
Multiplicand
Input
[15:0]
Result -
Chapter 2 CPU and Memory Space
CQR0
CER4
CR5 CR4 CR3
Multiplier [15:0]
-
-
Remainder [15:0]
Multiplier [15:0]
-
Multiplier [15:0]
-
ML62Q1000 Series User's Manual
CXR0
CER2 CER0
CR2 CR1
-
Product [31:0]
Dividend [31:0]
Quotient [31:0]
Dividend [31:0]
Quotient [31:0]
Addend [31:0]
Multiply-accumulate [31:0]
Addend [31:0]
Multiply-accumulate [31:0]
CR0
2-8