LAPIS Semiconductor ML62Q1000 Series User Manual page 339

Bit symbol
Bit no.
name
7 FTnOST
6 rsvd
5 FTnDTENN
4 FTnDTENP
3, 2 rsvd
1, 0 FTnMD1,
FTnMD0
FEUL62Q1000
This bit is used to set the repeat/one-shot mode of FTMn.
Ÿ TIMER, PWM1, PWM2 mode
0: Repeat mode (initial value)
1: One-shot mode
Ÿ CAPTURE mode
0: Auto mode
Even if the capture is performed once, data of the FTnEA and FTnEB register are
overwritten (updated) when the next capture is performed. When the counter goes
round, it restarts from 0.
1: Single mode
Once captured into the FTnEA or FTnEB register, the next capture is not performed
until reading the data. When the counter goes round, it stops.
Reserved bit
This bit is used to enable the dead time of negative phase output.
Ÿ TIMER, PWM1, PWM2 mode
0: Dead time is disabled (initial value)
1: Dead time enabled
Ÿ CAPTURE mode
This bit is invalid
This bit is used to enable the dead time of positive phase output.
Ÿ TIMER, PWM1, PWM2 mode
0: Dead time is disabled (initial value)
1: Dead time enabled
Ÿ CAPTURE mode
This bit is invalid
Reserved bit
These bits are used to choose the mode of FTMn.
00: TIMER mode (initial value)
01: CAPTURE mode
10: PWM1 mode
11: PWM2 mode
ML62Q1000 Series User's Manual
Chapter 9 Functional Timer (FTM)
Description
9-19