LAPIS Semiconductor ML62Q1000 Series User Manual page 234

Interrupt
source
IRQ
number
(interrupt
(priority)
request)
1 (high) IRQ0[0]
2
3 IRQ0[6]
4 IRQ0[7]
5 IRQ1[0]
6 IRQ1[1]
7 IRQ1[2]
8 IRQ1[3]
9 IRQ1[4]
10 IRQ1[5]
11 IRQ1[6]
12 IRQ1[7]
13 IRQ2[0]
14 IRQ2[1]
15 IRQ2[2]
16 IRQ2[3]
17 IRQ2[4]
18 IRQ2[5]
19 IRQ2[6]
20 IRQ2[7]
21 IRQ3[0]
22 IRQ3[1]
23 IRQ3[2]
24 IRQ3[3]
25 IRQ3[4]
26 IRQ3[5]
27 IRQ3[6]
28 IRQ3[7]
29 IRQ4[0]
30 IRQ4[1]
31 IRQ4[2]
32 IRQ4[3]
33 IRQ4[4]
34 IRQ4[5]
*1 The MCU status interrupt occurs when one of the following interrupt requests is enabled:
- An interrupt request due to occurrence of a RAM parity error
- An interrupt request due to completion of an automatic CRC calculation.
- An interrupt request due to completion of erasing/writing to the data flash
Enabling/disabling each interrupt request can be controlled through SFRs. See Chapter 29 "Safety Function" for
details.
FEUL62Q1000
Table 5-2 List of Interrupt Sources (1/2)
Register assignment
IE ILC
(interrupt (interrupt
enable) level)
- -
- - -
IE0[6] ILC0[13:12]
IE0[7] ILC0[15:14]
IE1[0] ILC1[1:0]
IE1[1] ILC1[3:2]
IE1[2] ILC1[5:4]
IE1[3] ILC1[7:6]
IE1[4] ILC1[9:8]
IE1[5] ILC1[11:10]
IE1[6] ILC1[13:12]
IE1[7] ILC1[15:14]
IE2[0] ILC2[1:0]
IE2[1] ILC2[3:2]
IE2[2] ILC2[5:4]
IE2[3] ILC2[7:6]
IE2[4] ILC2[9:8]
IE2[5] ILC2[11:10]
IE2[6] ILC2[13:12]
IE2[7] ILC2[15:14]
IE3[0] ILC3[1:0]
IE3[1] ILC3[3:2]
IE3[2] ILC3[5:4]
IE3[3] ILC3[7:6]
IE3[4] ILC3[9:8]
IE3[5] ILC3[11:10]
IE3[6] ILC3[13:12]
IE3[7] ILC3[15:14]
IE4[0] ILC4[1:0]
IE4[1] ILC4[3:2]
IE4[2] ILC4[5:4]
IE4[3] ILC4[7:6]
IE4[4] ILC4[9:8]
IE4[5] ILC4[11:10]
Interrupt External/
vector Mask internal
address source
0x0008 Disabled
0x000A Disabled
Internal
0x000C Enabled
0x000E Enabled
0x0010 Enabled
0x0012 Enabled
0x0014 Enabled
0x0016 Enabled
External
0x0018 Enabled
0x001A Enabled
0x001C Enabled
0x001E Enabled
0x0020 Enabled
0x0022 Enabled
0x0024 Enabled
0x0026 Enabled
Internal
0x0028 Enabled
0x002A Enabled
0x002C Enabled
0x002E Enabled
0x0030 Enabled External
0x0032 Enabled
0x0034 Enabled
0x0036 Enabled
0x0038 Enabled Internal
0x003A Enabled
0x003C Enabled
0x003E Enabled
0x0040 Enabled
0x0042 Enabled
0x0044 Enabled
Internal
0x0046 Enabled
0x0048 Enabled
0x004A Enabled
ML62Q1000 Series User's Manual
Chapter 5 Interrupts
Interrupt source
WDT interrupt
-
VLS0 interrupt
-
External interrupt 0
External interrupt 1
External interrupt 2
External interrupt 3
External interrupt 4
External interrupt 5
External interrupt 6
External interrupt 7
Clock backup interrupt
DMA controller interrupt
*1
MCU status interrupt
Serial communication unit 00 interrupt
Serial communication unit 01 interrupt
-
Successive approximation
type A/D converter interrupt
-
Extended external interrupt
-
2
I C bus master 0 interrupt
2
I C bus master 1 interrupt
Functional timer 0 interrupt
Functional timer 1 interrupt
16-bit timer 0 interrupt
16-bit timer 1 interrupt
2
I C bus unit interrupt
Serial communication unit 10 interrupt
Serial communication unit 11 interrupt
-
Functional timer 2 interrupt
Functional timer 3 interrupt
Interrupt
source
symbol
WDTINT
-
VLS0INT
-
EXI0INT
EXI1INT
EXI2INT
EXI3INT
EXI4INT
EXI5INT
EXI6INT
EXI7INT
CBUINT
DMACINT
MCSINT
SIU00INT
SIU01INT
-
SADINT
-
EXTXINT
-
I2CM0INT
I2CM1INT
FTM0INT
FTM1INT
TM0INT
TM1INT
I2CU0INT
SIU10INT
SIU11INT
-
FTM2INT
FTM3INT
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