LAPIS Semiconductor ML62Q1000 Series User Manual page 503

Bit Bit symbol
name
No.
1 I2MnACR
0 I2MnBB
[Note]
Ÿ
Do not update each bit of the I2MnSTR register by using the bit symbol. Update it by using a byte access,
not so that unintented bits are changed by the bit access instructions.
Ÿ
I2MnBB bit and I2MnBO bit are reset one I
FEUL62Q1000
communication terminates when the clock stretch function is not used (I2MnSYN = "0").
To reset this bit, write "1" to this bit or write "0" to I2MnEN bit.
0: There was no transmission error (initial value)
1: There was a transmission error
This bit is used to store the acknowledgment signal received.
Acknowledgment signals are received when the slave address is transmitted and the data
transmission/reception is completed.
When "1" is written to this bit, this bit is reset to "0".
0: Received acknowledgment "0" (initial value)
1: Received acknowledgment "1"
This bit is used to indicate the usage state of the I2C bus.
When the start condition is generated on the I2C bus this bit is set to "1", and when the stop
condition is generated this bit is reset to "0".
To reset this bit, write "1" to this bit.
2
0: The status of I C bus is free (initial value)
2
1: The status of I C bus is busy
2
C operating clock after writing "1" to the bits.
ML62Q1000 Series User's Manual
Description
Chapter 13 I2C Master
13-12