LAPIS Semiconductor ML62Q1000 Series User Manual page 547

BZ0RUN
LSCLK
(32.768 kHz)
BZ0P pin
BZ0N pin
BZ0RUN
LSCLK
(32.768 kHz)
BZ0P pin
BZ0N pin
[Note]
Ÿ
In the single sound mode, the BZ0RUN bit of the BZ0CON register is cleared to "0" when the single
sound buzzer output is ended.
FEUL62Q1000
4.096kHz
(1) When positive logic is applied (BZ0INI bit of BZ0MOD register=0)
Setting example: buzzer frequency=4.096 kHz, duty=3/8 (37.5%)
4.096kHz
(2) When negative logic is applied (BZ0INI bit of BZ0MOD register=1)
Setting example: buzzer frequency=4.096 kHz, duty=3/8 (37.5%)
Figure 15-13 Buzzer Output Automatic Stop Timing in Single Sound Mode
ML62Q1000 Series User's Manual
4.096kHz
4.096kHz
Chapter 15 Buzzer
15-16