LAPIS Semiconductor ML62Q1000 Series User Manual page 419

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Synchronous Serial I/O (SSIO) port mode
If writing a data to the SDnBUF register, it also written to the transmission register (SUnTR).
If reading the SDnBUF register, data in the reception register (SUnRC) is read out.
In 8-bit mode, the SDnBUFH register is not available to use. The operation of transmission/reception/transmission
& reception starts by writing data to the SDnBUFL register. In 16-bit mode, The operation of
transmission/reception/transmission & reception starts by writing data to the SDnBUFH register.
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UART Full-duplex mode
The SDnBUFL register works as the reception buffer and the SDnBUFH register works as the transmission buffer.
Data receptiond at the end of reception communication is overwritten into the SDnBUFL register, so read out the
SDnBUFL register by using the serial communication n interrupt generated at the end of reception communication.
Writing to the SDnBUFL register is invalid in the Full-duplex communication mode.
When choosing the 5 to 7 bit length, unused bits return "0" for reading.
Write transmission data to the SDnBUFH register. For countinous transmitting, write the next transmission data to
the SDnBUFH register after checking Un1FUL bit of UARTn1 status register (UAn1STAT) is "0". The written
data in the SDnBUFH register can be read out .
When choosing the 5 to 7 bit length, written data in unused bits are invalid.
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UART Half-duplex mode
The SDnBUFL register and the SDnBUFH register works as the reception buffer or transmission buffer.
Data received at the end of reception communication is overwritten into the SDnBUFL or SDnBUFH register, so
read out the registers by using the serial communication n interrupt generated at the end of reception
communication.
Writing to the SDnBUFL or SDnBUFH register is invalid in the Full-duplex communication mode.
When choosing the 5 to 7 bit length, unused bits return "0" for reading.
Write transmission data to the SDnBUFL or SDnBUFH register. For countinous transmitting, write the next
transmission data to the registers after checking Un0FUL bit of UARTn0 status register (UAn0STAT) or Un1FUL
bit of UARTn1 status register (UAn1STAT) is "0". The written data in the SDnBUFH register can be read out .
When choosing the 5 to 7 bit length, written data in unused bits are invalid.
[Note]
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In the half-duplex communication mode of UART, be sure to choose the transmission mode by setting
Un0IO and Un1IO bit of the UARTn mode register (UAn0MOD, UAn1MOD) before writing the
transmission data to SDnBUFL and SDnBUFH.
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Do not perform write-operation to the SDnBUF in the SSIO slave reception mode.
FEUL62Q1000
ML62Q1000 Series User's Manual
Chapter 11 Serial Communication Unit
11-17