LAPIS Semiconductor ML62Q1000 Series User Manual page 301

1 -
0 THnCS
[Note]
Ÿ
Input the pulse for the external trigger with the width of two timer clocks or longer.
Ÿ
Set TMHnMOD when the timer n is stopped(THnSTAT/THnHSTAT bits of TMHSTAT register are "0").
If it is changed while it is operating, the operation is not guaranteed.
Ÿ
In the 8-bit timer mode, the operation mode specified by THnCS0 to 1, THnDIV2 to 0 and THnOST are
common for both upper side and lower side of the timer.
FEUL62Q1000
clock chosen by the THnCS bit.
Reserved bit
This bit is used to choose the timer clock of the 16-bit timer n timer.
0: LSCLK (initial value)
1: HSCLK
ML62Q1000 Series User's Manual
Chapter 8 16-Bit Timer
8-10