LAPIS Semiconductor ML62Q1000 Series User Manual page 555

[Note]
Ÿ
When reading the SRTCMAS register, read it twice and check that the two values coincide with each
other to prevent reading of undefined data during counting up.
Ÿ
If the data outside the range from 00 minutes 00 seconds to 59 minutes 59 seconds is written to the
SRTCMAS register, the register will be set to the initial value.
Ÿ
An interrupt request may be generated immediately after writing depending on the timing of writing data
to the SRTCMAS register. To prevent an interrupt request from being generated while writing time data,
disable the periodical interrupt request using the simplified RTC control register (SRTCCON) before
writing to the SRTCMAS register.
Ÿ
It is recommended that data is written to the SRTCMAS register with word access.
Ÿ
After enabling the write operation using the RTCACP register, data can be written to the SRTCMAS
register only once regardless of using byte or word access. If writing twice using 8-bit access after the
write operation is enabled, the second writing is ignored.
Ÿ
If 0 second (0x00) is written to the second counter (SRTCSEC) when it is 59 second (0x59), the minute
counter (SRTCMIN) counts up. However, if the minute counter is also written at the same time using
16-bit access, then it does not count up and the written value becomes valid.
FEUL62Q1000
ML62Q1000 Series User's Manual
Chapter 16 Simplified RTC
16-5