AT&T 3B2/300 Technical Reference Manual page 527

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FUNCTIONAL D E S C R I P T I O N - - - - - - - - - - - - - - - - - - - - - - - - - - -

Control Status Register

The CM525B Card contains a 26-bit Control and Status Register (CSR). The CSR is a modified

version of the standard CSR for a buffered microbus peripheral. For normal operation, each bit is

individually controlled by hardware, firmware/software, or both. For diagnostic purposes, each bit is

designed to be individually written (set or clear) by firmware/software. This is accomplished by

performing a byte write to the specified address plus three and driving a "1" or "O" onto bit O of

The CSR is read by performing a 32-bit read access at the base address (Ox 0010000). The CSR bits

are defined in the following table.

VME CONTROL AND STATUS REGISTER BIT ASSIGNMENTS

XBUS INTERRUPT BUFFER ENABLE

UNEQUIPPED ADDRESS ERROR

DIRECTOR FAULT

XBUS REQUEST LOCK

INHIBIT XBUS RESERVATION

TRANSACTION DIRECTION

RECEIVED XBUS ERROR

RECEIVED BUBUS FAULT

INHIBIT XBUS PARITY

LEVELlOINTERRUPT

DATA PARITY ERROR

ADDRESS PARITY ERROR

ERROR REPORTING

ERROR DETECTED

LEVEL15INTERRUPT

Cleared by "system reset" signal

Cleared by hardware

Set by hardware

Cleared by programmed control

Set by programmed control

Set by "system reset" signal

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