AT&T 3B2/300 Technical Reference Manual page 503

FUNCTIONAL D E S C R I P T I O N - - - - - - - - - - - - - - - - - - - - - - - - - - -
EPORTS CARD ADDRESS MAP
MEMORY 1/0 CHIP
DESCRIPTION ACCESS
WIDTH SIZE
ADDRESS ADDRESS SELECT (BITS) (BYTES)
Ox 00000
- LCS DRAM (VECTOR TABLE) READ/WRITE 16 128K
Ox 80000 - MCS DPDRAM(3B2 MAIN MEMORY) READ/WRITE 16 128K
Ox C0080 Ox 0480
PSl ID/VECTOR REGISTER WRITE 16 2
Ox C0082 Ox 0482 PSl PAGE REGISTER
WRITE
7 1
Ox C0084 Ox 0484 PSI PCSR BITS 7-0 READ 8 1
Ox C0086 Ox 0486 PSI
NOT USED - -
-
Ox C0088 Ox 0488 PSI PCSR BIT O (INTO)
(NOTE 1)
1 -
Ox C0089 Ox 0489 PSl PCSR BIT 1 (INTI) (NOTE 1) 1
-
Ox COOSA Ox 048A PSI PCSR BIT 2 (EOPO) (NOTE 1) 1 -
Ox C008B
Ox 048B PSI PCSR BIT 3 (EOPl) (NOTE 1) 1 -
Ox C008C Ox 048C PSI PCSR BIT 4 (EOP2) (NOTE 1) 1
-
Ox C008D
Ox 0480 PSI PCSR BIT 5 (EOP3) (NOTE 1) 1 -
Ox C008E Ox 048E
PSI PCSR BIT 6 (NOT USED) - - -
Ox C008F Ox 048F PSI PCSR BIT 7 (PINTOO) (NOTE 1) 1 -
Ox COlOO Ox 0500 PS2
DTR REGISTER READ/WRITE
8
1
Ox C0200 Ox 0600 PS4 DMACO READ/WRITE 8 32
Ox C0220 Ox 0620 PS4 DMACl READ/WRITE 8 32
Ox C0240 Ox 0640
PS4 DMAC2 READ/WRITE 8 32
Ox C0260 Ox 0660 PS4
DMAC3 READ/WRITE
8
32
Ox C0280 Ox 0680 PSS SCCO (CH B) READ/WRITE 8 1
Ox C0281 Ox 0681
PSS SCCO (CHA) READ/WRITE 8 1
Ox COZAD Ox 06AO PSS SCCl (CH B) READ/WRITE 8 1
Ox C02Al Ox 06Al PSS
SCCl (CH A) READ/WRITE
8
1
Ox C02CO Ox 06CO PSS SCC2 (CH B) READ/WRITE 8 1
Ox C02Cl
Ox 06Cl PSS SCC2 (CH A) READ/WRITE 8 1
Ox C02EO Ox 06EO PSS SCC3 (CH B) READ/WRITE 8 1
Ox C02El
Ox 06El PSS SCC3 (CH A) READ/WRITE 8 1
Ox C0300 Ox 0700
PS6 SCCIACK READ 8 1
(NOTE 2) - 80186 80186 CONTROL BLOCK READ/WRITE 16 256
Ox F8000
-
ucs
ROM READ 16 32K
NOTES:
1. Bit is cleared by 80186 Microprocessor access.
2. After a reset, this address is an 1/0 address, Ox OFFOO.
It may be reprogrammed to a different address.
LEGEND:
DMAC DIRECT MEMORY ACCESS CONTROLLER
DPDRAM DUAL PORT DYNAMIC RANDOM ACCESS MEMORY
DTR DATA TERMINAL READY
EOP END OF PROCESS
LCS LOWER CHIP SELECT
MCS MEMORY CHIP SELECT
PCSR PERIPHERAL CONTROL AND STATUS REGISTER
PS PERIPHERAL SELECT
sec
SERIAL COMMUNICATION CONTROLLER
SC CIA CK SERIAL COMMUNICATION CONTROLLER INTERRUPT ACKNOWLEDGE
UCS UPPER CHIP SELECT
Figure 3-76: CM195Y EPORTS Card Address Map
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