AT&T 3B2/300 Technical Reference Manual page 371

FUNCTIONAL D E S C R I P T I O N - - - - - - - - - - - - - - - - - - - - - - - - - - -
PHYSICAL ADDRESS BITS
PAS[O) IACK[O) SELECTED DEVICE
27-24 23-20
19-16 15-12
X X
xxxx xxxx xxxx 0000 MEMORY MANAGEMENT UNIT (MMUCS[O])
X X
xxxx xxxx
xxxx 0001 TIME-OF-DAY COUNTER (TODCS[O])
X
X
xxxx xxxx
xxxx
0010 TIMERS (TIMRCS[O])
X
X
xxxx xxxx xxxx 0011 NONVOLATILE RANDOM ACCESS MEMORY (NVRCS[O])
X X
xxxx xxxx
xxxx 0100 CONTROL AND STATUS REGISTER (CSRCS[O])
X
X
xxxx xxxx xxxx 0101 PAGE REGISTER 1 (PRlCS[O])
X X
xxxx xxxx xxxx
0110 PAGE REGISTER 2 (PR2CS[O])
X
X
xxxx xxxx xxxx 0111 PAGE REGISTER 3 (PR3CS[O])
X X
xxxx xxxx
xxxx 1000 DIRECT MEMORY ACCESS CONTROLLER (DMACS[O])
X X
xxxx xxxx xxxx 1001 DUART (UARTCS[O])
X X
xxxx
xxxx
xxxx 1010 HARD DISK CONTROLLER (DSKCS[O])
X
X
xxxx
xxxx xxxx 1011 NOT USED
X X
xxxx xxxx xxxx
1100 MEMORY SIZE REGISTER (MSIZECS[O])
X
X
xxxx xxxx xxxx 1101 FLOPPY DISK CONTROLLER (FCS[O])
X X
xxxx
xxxx
xxxx
1110
PAGE REGISTER 4 (PR4CS[O])
X X
xxxx xxxx xxxx 1111 NOT USED
X X
xxxO OOOx xxxx xxxx NOT USED
X X
xxxO OOlx xxxx
xxxx
PERIPHERAL CARD 01 (PCSOl[O])
X X
xxxO OlOx xxxx xxxx PERIPHERAL CARD 02 (PCS02[0])
X X
xxxO 011x xxxx xxxx PERIPHERAL CARD 03 (PCS03[0])
X
X
xxxO lOOx
xxxx
xxxx PERIPHERAL CARD 04 (PCS04[0])
X X
xxxO lOlx xxxx xxxx PERIPHERAL CARD 05 (PCS05[0])
X
X
xxxO 110x xxxx
xxxx
PERIPHERAL CARD 06 (PCS06[0])
X X
xxxO 11 lx
xxxx
xxxx PERIPHERAL CARD 07 (PCS07[0])
X
X
xxxl OOOx xxxx xxxx PERIPHERAL CARD 08 (PCS08[0])
X X
xxxl OOlx
xxxx
xxxx PERIPHERAL CARD 09 (PCS09[0])
X
X
xxxl OlOx xxxx xxxx PERIPHERAL CARD 10 (PCSlO[O])
X X
xxxl
011x
xxxx
xxxx PERIPHERAL CARD 11 (PCS11[0])
X X
xxxl lOOx
xxxx
xxxx
PERIPHERAL CARD 12 (PCS12[0])
X
X
xxxl lOlx xxxx xxxx PERIPHERAL CARD 13 (PCS13[0])
X X
xxxl 110x xxxx
xxxx
PERIPHERAL CARD 14 (PCS14[0])
X X
xxxl 111x
xxxx
xxxx PERIPHERAL CARD 15 (PCS15[0])
0
1 xOOO 0000 OOOx xxxx READ ONLY MEMORY (ROMCS[O])
0 1 xOOx xxlx
xxxx xxxx
INPUT /OUTPUT REQUIRED (IOREQ[O])
0
1 xOOx xlxx xxxx xxxx ' '
0 1 xOOx lxxx xxxx
xxxx
:
0
1 xOOl xxxx xxxx xxxx I
0 1 xOOO 0000 OlOx lxxx DIRECT MEMORY ACCESS SUBSYSTEM (DMASS[O])
0
1
xOOO
0000 OlOx Oxxx MISCELLANEOUS (MISCS[O])
LEGEND:
x Don't care bit
Figure 3-33: Chip Select and Control Signals Address Decode
3-118 TECHNICAL REFERENCE MANUAL