AT&T 3B2/300 Technical Reference Manual page 375

FUNCTIONAL D E S C R I P T I O N - - - - - - - - - - - - - - - - - - - - - - - - - - -
VERSION 3-CONTROL, ST A TUS, AND ERROR REGISTER BIT ASSIGNMENTS
WRITE
BIT DESCRIPTION
ADDRESS
0 UNIX INTERVAL TIMER TIMEOUT Ox 00044000
1 POWER DOWN REQUEST
Ox 00044004
2 OPER. INTERRUPT LEVEL 15 Ox 00044008
3 DUART INTERRUPT Ox 0004400C
4
DUART OMA COMPLETE INTERRUPT Ox 00044010
5 PIR LEVEL 9 Ox 00044014
6 PIR LEVEL 8 Ox 00044018
7 INHIBIT UNIX INTERVAL TIMER
Ox 0004401C
8 INHIBIT SYSTEM SANITY TIMER Ox 00044020
9 INHIBIT UBUS TIMER Ox 00044024
10 INHIBIT FAULTS TO CPU Ox 00044028
11 INHIBIT SINGLE BIT ERROR RPT. Ox 0004402C
12 INHIBIT INTEGRAL 3B2 1/0 BUS Ox 00044030
13 INHIBIT 4 BUB SLOTS Ox 00044034
14 FORCE ECC SYNDROME Ox 00044038
15
THERMAL SHUTDOWN REQUEST
Ox 0004403C
16 FAILURE LED ON
Ox 00044040
17 POWER DOWN-POWER SUPPLY Ox 00044044
18 FLOPPY SPEED FAST Ox 00044048
19
FLOPPY SIDE 1 Ox 0004404C
20 FLOPPY MOTOR ON Ox 00044050
21 FLOPPY DENSITY Ox 00044054
22 FLOPPY SIZE Ox 00044058
23 SINGLE BIT ERROR
Ox 0004405C
24 MULTIPLE BIT ERROR Ox 00044060
25 UBUS/BUB RECEIVED FAIL Ox 00044064
26 UBUS TIMER TIMEOUT Ox 00044068
27 FAULT REGISTERS FROZEN Ox 0004406C
28
DATA ALIGNMENT ERROR Ox 00044070
29 SANITY TIMER TIMEOUT
Ox 00044074
30
ABORT SWITCH ACTIVATED Ox 00044078
31 SYSTEM RESET REQUEST Ox 0004407C
LEGEND:
CR
DMA
HS
PC
PIR
PS
SR
Cleared by "system reset" signal
Direct Memory Access
Set by hardware
Cleared by programmed control
Programmed Interrupt Request
Set by programmed control
Set by "system reset" signal
ACTIVE
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET
CLEAR
SET
SET
CLEAR
SET
CLEAR
CLEAR
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET
Figure 3-34: Version 3 System Board CSER Bit Assignments
3-122 TECHNICAL REFERENCE MANUAL
PROPERTIES
HS
PC
HS PS PC
HS PS PC
HS PC
HS PC
PS PC
PS PC
PS PC SR
PS PC SR
PS PC SR
PS PC
SR
PS PC
PS PC
PS PC
PS PC
HS PC
HS PS PC
PS PC SR
PS PC
PS PC
PS PC SR
PS PC
PS PC
HS PC
HS PC
HS PC
HS PC
HS PC
HS PC
HS PC
HS PC
PS
CR
CR