AT&T 3B2/300 Technical Reference Manual page 445

FUNCTIONAL D E S C R I P T I O N - - - - - - - - - - - - - - - - - - - - - - - - - -
Memory and Peripheral Chip Selects
The memory and peripheral chip selects are programmed by the GPSC firmware to provide chip
selects in the 80C186 Microprocessor memory map (Figure 3-60).
GPSC CARD ADDRESS MAP
MEMORY
1/0
CHIP WIDTH SIZE
ADDRESS
ADDRESS SELECT
DESCRIPTION ACCESS
(BITS) (BYTES)
Ox 00000
-
LCS GPSC LOCAL DRAM READ/WRITE 16 256K
Ox 40000 -
LCS GPSC LOCAL DRAM READ/WRITE 16
512K
Ox COOOO
-
MCSO 3B2 MAIN MEMORY READ/WRITE 16 32K
Ox C8000
- MCSl 3B2 MAIN MEMORY READ/WRITE 16 32K
Ox 00000 - MCS2
3B2 MAIN MEMORY
READ/WRITE 16 32K
Ox 08000
-
MCS3 3B2 MAIN MEMORY READ/WRITE 16 32K
Ox EOOOO
Ox 0400 PCSO NOT USED (DEBUGGING ONLY) READ/WRITE 8 16
Ox E0080 Ox 0480 PCSl ID/VECTOR REGISTER
WRITE 16
2
Ox E0082 Ox 0482 PCSl CIO PAGE REGISTER WRITE 8 1
Ox E0084 Ox 0484
PCSl PCSR[7-0] READ
8
1
Ox E0086 Ox 0486 PCSl
RESERVED
Ox E0088 Ox 0488 PCSl
PCSR BIT O (INTO) (NOTE 1)
1
Ox E0089 Ox 0489 PCSl PCSR BIT 1 (INTI) (NOTE 1) 1
Ox E008A
Ox 048A PCSl PCSR BIT 2 (INT2) (NOTE 1) 1
Ox E008B Ox 048B
PCSl PCSR BIT 3 (NM!) (NOTE 1) 1
Ox E008C Ox 048C PCSl
PCSR BIT 4 (BAF-DMA BLOCK) 1
Ox E008D
Ox 0480 PCSl PCSR BIT 5 (RESERVED) 1
Ox E008E Ox 048E
PCSl PCSR BIT 6 (BAF-ABORT) (NOTE 1) 1
Ox E008F Ox 048F PCSl
PCSR BIT 7 (PINTOO) (NOTE 1) 1
Ox EOlOO Ox 0500 PCS2 ADMA PAGE REGISTER
WRITE 16
2
Ox E0180 Ox 0580 PCS3 APPL. CONTROL REGISTER READ/WRITE 16 2
Ox E0200 Ox 0600
PCS4 ADMAC READ/WRITE 8 32
Ox E0280 Ox 0680 PCS5
DUART CHANNEL B (85C30) READ/WRITE 8 1
Ox E0281 Ox 0681 PCS5
DUART CHANNEL A (85C30) READ/WRITE
8 1
Ox E02CO Ox 06CO PCS5 8536 READ/WRITE 8 4
Ox E0300 Ox 0700 PCS6
UNDEFINED
-
Ox FFOO 80Cl86
80186 CONTROL BLOCK (NOTE 2) READ/WRITE 16 256
Ox E0600 - 80Cl86 RELOCATED CTL BLOCK READ/WRITE 16 256
Ox F8000
-
ucs
EPROM READ 16 32K
NOTES:
1. Bit is cleared by 80186 Microprocessor access.
2. After a reset, the 80C186 control block is located at 1/0 address OxOFFOO.
LEGEND:
ADMAC Application Direct Memory Access Controller
BAF Bus Abort Feature
OMA Direct Memory Access
LCS Lower RAM Chip Select
MCS Memory Chip Select
PCS Peripheral Chip Select
PCSR Peripheral Control and Status Register
UCS Upper RAM Chip Select
Figure 3-60: CMl 95AE GPSC Card Address Map
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