AT&T 3B2/300 Technical Reference Manual page 309

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FUNCTIONAL D E S C R I P T I O N - - - - - - - - - - - - - - - - - - - - - - - - - -
r-----------------------------------------,
r-----------,
WE 32100
MICROPROCESSOR
.
I
L-----------~
vcc
NC
I
I
I
I
I
-
I
I
I
I
I
I
I
I
.
I
I
-
I
I
WE 32106 MATH ACCELERATION UNIT
COMMON CONTROL
CIRCUITS
11
I
I
I~
1 •
COMMAND
EXPONENT
FRACTION
AND STATUS
DATA PATH
DATA PATH
REGISTERS
'~
11
I~
'~
1 •
INPUT /OUTPUT
LOGIC CIRCUITS
DATA BITS 31-00[1]
ACCESS ST A TUS (SAS03-00[1])
CLK23[1 ], CLK34[1]
CYCLE INITIATE (CYCLEl[O])
DATA READY (DRDY[O])
DATA STROBE (DS[O])
READ/WRITE (R[l]/W[O])
RESET[O])
-
DONE[O]
FAULT (FLT[O])
SYNCHRONOUS READY (SRDY[O])
ADDRESS BITS 04-02[1]
DATA SHADOW (DSHD[O])
CHIP SELECT (CS[O])
HIGHZ[O])
~
DATA TRANSFER ACKNOWLEDGE (DTACK[O])
L-----------------------------------------~
Figure 3-20:
WE 32106 Math Acceleration Unit -
Functional Block Diagram
3-56
TECHNICAL REFERENCE MANUAL

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