AT&T 3B2/300 Technical Reference Manual page 477

FUNCTIONAL D E S C R I P T I O N - - - - - - - - - - - - - - - - - - - - - - - - - -
CM195T INTELLIGENT SERIAL CONTROLLER
PERIPHERAL INPUT/OUTPUT BUS INTERFACE
(BACKPLANE CONNECTOR)
1~
80186 CPU
,
16K X 16
AND
20
READ ONLY
MISCELLANEOUS
7
16
MEMORY
.
LOGIC CIRCUITS
,
16
,
16
o ID~VECTOR
.
R GISTER
,
64K X 16
o PAGE REGISTER
DYNAMIC RANDOM
o PCSR 1~ ACCESS MEMORY
,
ADDRESS
DATA
CONTROL
•
BITS 19-00[1]
BITS 15-00[1]
r-
--------------..--
--
------------------------,
SERIAL INTERFACE
8237
-
s.
,
-
~
DIRECT
MEMORY -
8.
LINE DRIVERS/RECEIVERS
ACCESS
,
-
AND
CONTROLLER
37-PIN TO DUAL DB-25 CONNECTOR
CIRCUITS
CONTROL
CLEAR TO SEND (CTS)
JOI
I TRANSMIT CLOCK INPUT (TXCI)
I
I
s.
DAT A SET READY (DSR)
I
-
,
RING INDICATOR (RI)
-
,
-
RECEIVE CLOCK (RXC)
I
r-f.
8274
DATA CARRIER DETECT (DCD)
I
DUAL CHANNEL I
I
'4.
COMMUNICATIONS
CHA
I
I
CIRCUIT TRANSMIT CLOCK OUTPUT (TXCO) I
I
-
I
REQUEST TO SENT (RTS)
I
.
CH B
DAT A TERMINAL READY (DTR)
I
I
-
- I
.....
-
-
I
I
t
CONTROL
I
I
CONTROL
I
I
I
I
J
CHA
002)
)
CHB
003)
CHA
I
NONRETURN
-
-·
TO ZERO
RECEIVE DATA (RXD)
I
INSERTION
-
I
-
ENCODER
I
AND TRANSMIT DATA (TXD)
I
DECODER
-
I
CHB
-
CIRCUITS
.
-
-
-
I
I
I
L--------------------------------------------J
Figure 3-69: CM195T ISC Card - Functional Block Diagram
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