AT&T 3B2/300 Technical Reference Manual page 486

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INTEL 80186 Microprocessor
The intelligence of the STARLAN card is provided by an INTEL 80186, 16-bit microprocessor
operating at 8 MHz. Some of the microprocessor features used for the STARLAN card are described in
the following paragraphs. Figure 3-72 shows the STARLAN Interface card address map.
Input/Output Bus Control
1/0 bus control circuitry responds to 1/0 bus and 80186 Microprocessor control signals. Three
major paths are listed below:
• 80186 Microprocessor read or write of the system board main memory
• System board CPU read or write STARLAN card
• Interrupt Acknowledge (PIAK[O]).
The 1/0 bus control circuitry responds to the 1/0 bus and to the 80186 Microprocessor control
signals by selectively enabling the appropriate 1/0 bus signals. In addition, the Bus Abort Feature
(BAF) can be prematurely forced. Certain PCSR bits can also be set when the STARLAN Interface card
is accessed.
ID/Vector Register
The ST ARLAN Interface card ID /Vector Register is a 16-bit register that is used for two functions.
Initially the register contains the 16-bit STARLAN Interface card ID code. Later the register contains an
8-bit interrupt vector. The interrupt vector is returned in response to an Interrupt Acknowledge
(PIAK[O]) signal. On reset, the 80186 Microprocessor writes the ID code to the ID/Vector Register and
waits. The STARLAN Interface card ID code is Ox 0002. During system self-configuration, the system
board CPU polls each feature card slot. This polling reads the ID/Vector Register. The two bytes of
the ID /Vector Register are a unique 16-bit ID code of the card.
Page Register
The STARLAN Interface card uses a 24-bit 1/0 address to do system board main memory
operations. The lower 17 bits are provided by the 80186 Microprocessor. The most significant 7 bits
are provided by the Page Register. The Page Register is a write only register for the 80186
Microprocessor. The two most significant address bits (bits 06 and 05) of the Page Register are always
zero. This allows the Page Register to select thirty-two 128 kilobyte segments of main memory. The
Page Register is addressed by the 80186 Microprocessor at its 1/0 address Ox 0482. Bits 06-00 of the
Page Register map to Peripheral Physical Address bits 23-17 (PP A23-17[1 ]).
FUNCTIONAL DESCRIPTION 3-233