AT&T 3B2/300 Technical Reference Manual page 361

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FUNCTIONAL D E S C R I P T I O N - - - - - - - - - - - - - - - - - - - - - - - - - - -
r-----------,
·-
WE 32200
MICROPROCESSOR
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
L-----------~
vcc
NC
- -
r-----------------------------------------,
WE 32206 MA TH ACCELERATION UNIT
COMMON CONTROL
CIRCUITS
'w
,
,,
COMMAND
EXPONENT
FRACTION
AND STATUS
DATA PATH
-
DATA PATH
REGISTERS
-
,,
,,
INPUT /OUTPUT
LOGIC CIRCUITS
DATA BITS 31-00[1]
I
ACCESS STATUS (SAS03-00[1])
CLK23[1 ], CLK34[1]
CYCLE INITIATE (CYCLEI[O])
DATA READY (DRDY[O])
DATA STROBE (DS[O])
READ/WRITE (R[l]/W[O])
RESET[O])
I
I
DONE[O]
I
I
FAULT (FLT[O])
I
SYNCHRONOUS READY (SRDY[O])
'
I
I
ADDRESS BITS 04-02[1]
I
DAT A SHADOW (DSHD[O])
I
CHIP SELECT (CS[O])
I
HIGHZ[O])
I
-
I
DATA TRANSFER ACKNOWLEDGE (DTACK[O])
I
I
I
L-----------------------------------------~
Figure 3-32:
WE 32206 Math Acceleration Unit -
Functional Block Diagram
3-108
TECHNICAL REFERENCE MANUAL

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