AT&T 3B2/300 Technical Reference Manual page 340

- - - - - - - - - - - - - - - - - - - - - - - - - - - FUNCTIONAL DESCRIPTION
VERSION 3 382 COMPUTER SYSTEM BOARD
CLOCKS:
- 24 MHz
- 22 MHz
- 18 MHz
- 16 MHz
- 5
MHz
CENTRAL
PROCESSING
UNIT, MEMORY
MANAGEMENT
UNIT(S) AND
MATH
ACCELERATION
UNIT
,-----,
I 0 OR 1 I
I
UBus
I
I
I
I
SLOT
I
I
I
I I
I I
I I
L--
_ j
CA[3 l-00]1,
CD[31-00]I
PBus
BUFFERS
WAIT STATE
AND STROBE
GENERATOR
SLAVE BUS
BUFFERS
BuBus
BUFFERS
INTERRUPT
CONTROL,
TIMERS,
EPROMs CONTROL AND
TOD, NVRAM,
(2 OR 4)
STATUS REGISTER
FAULT LATCHES
SADD[31-00)1, SD[3!-00]1
BYPASS REQUEST
AND
CONTROL SEQUENCERS
BA[27-00)1, BD[31-00)l
ADDRESS
DECODER/
CHIP SELECT
GENERATION
MICROBUS
ARBITER,
PBus REQUEST
GENERATION
,----------,
I 1, 2, 3 I
I
OR
4 I
I I
, - - - - - -... - - - - - - - - - - - - - - - - - - - - . , ~ Bu Bus 1
,---------,
I O OR 3 I
I PBUS t,---'41
I SLOTS
I I
L--------j
MEMORY
AND REFRESH
SEQUENCERS
MEMORY
BUS BUFFERS
MEMORY
CONTROLLER
w/ECC
MUXA(I0-00)1,
MD[31-00]I,
MCB[ll-00]1
382 1/0 BUS
ADAPTER
PPA[16-0l]l,
PD[!S-00]1
IPA[07-00]1,
IPD[07-00]I
OMA
SUBSYSTEM
BUFFERS
---,
,--------
---------,
- - ~ - - , I I
I I I
I I I
I I I
I I I
I I 7 OR 12 382 1/0 SLOTS I
MEMORY I I I
I SLOTS I L - - - - - - - - - - - - - - - - -
j
2
OR 4
L------j
I
SLOTS
I
I I
L---------j
FLOPPY DISK
CONTROLLER
DIRECT MEMORY
ACCESS
CONTROLLER,
PAGE REGISTERS
DUAL UNIVERSAL
ASYNCHRONOUS
RECEIVER/
TRANSMITTER
CONSOLE
AND CONTTY
Figure 3-27: Version 3 3B2 Computer System
Board - Functional Block Diagram
FUNCTIONAL DESCRIPTION 3-87