AT&T 3B2/300 Technical Reference Manual page 465

FUNCTIONAL D E S C R I P T I O N - - - - - - - - - - - - - - - - - - - - - - - - - -
CTC CARD ADDRESS MAP
MEMORY 1/0
CHIP
ADDRESS ADDRESS SELECT
DESCRIPTION
Ox 00000
- LCS CTC DRAM (VECTOR TABLE)
Ox 80000 - MCS SBDDPDRAM
Ox COOBO Ox 0480
PSI ID/VECTOR REGISTER
Ox C0082 Ox 0482 PSI PAGE REGISTER
Ox C0084 Ox 0484 PSI
PCSR BITS 7-0
Ox C0088
Ox 0488 PSI PCSR BIT O (INTO)
Ox C0089 Ox 0489 PSI
PCSR BIT 1 (INTI)
Ox COOSA
Ox 048A PSI PCSR BIT 2 (INT2)
Ox C008B Ox 048B PSI PCSR BIT 3 (INT3)
Ox COOBC Ox 048C PSI
PCSR BIT 4 (NOT USED)
Ox C008D
Ox 0480 PSI PCSR BIT 5 (RESERVED)
Ox C008E
Ox 048E PSI PCSR BIT 6 (BAF)
Ox COOBF Ox 048F PSI
PCSR BIT 7 (PINT)
Ox COlOO Ox 0500
PS2 8237 OMA CONTROLLER
Ox C0200 Ox 0600 PS4
FLOPPY DISK CONTROLLER
Ox C0300 Ox 0700 PS6
SELECT/CONFIGURATION REGISTER
Ox C0450 Ox FF50 80186 TIMER O CONTROL
Ox C04AO Ox FFAO 80186
ADDRESS DECODER
Ox C04FE
Ox FFFE 80186 RELOCATION REGISTER
Ox FCOOO
-
ucs
ROM
NOTES:
1. Bit is cleared by 80186 Microprocessor access.
2. Bit is set to Oby 80186 Microprocessor access
unless a "dummy" read is pending.
3. Firmware can re-program the UCS addresses for 32K bytes.
LEGEND:
BAF Bus Abort Feature
OMA Direct Memory Access
DRAM Dynamic Random Access Memory
LCS Lower RAM Chip Select
MCS Memory Chip Select
PS Peripheral Select
PCSR Peripheral Control and Status Register
UCS Upper RAM Chip Select
Figure 3-66: CMl 95H CTC Card Address Map
3-212 TECHNICAL REFERENCE MANUAL
WIDTH SIZE
ACCESS
(BITS)
(BYTES)
READ/WRITE - 128K
READ/WRITE 16 128K
WRITE 16 2
WRITE 7 1
READ
8
1
(NOTE 1) 1
-
(NOTE 1) 1
-
(NOTE 1) 1 -
(NOTE 1) 1
-
-
1
-
- 1
-
(NOTE 2) 1
-
(NOTE 1) 1
-
READ/WRITE - 128K
READ/WRITE
-
128K
WRITE 16 2
- -
-
- - -
- 16 2
READ 16 16K