AT&T 3B2/300 Technical Reference Manual page 364

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OS
us
QS
PR
uw
VER
FE
Bit 08 is the Overflow Sticky (OS) bit. Bit 08 is set [1] when an exponent of a
rounded result of an arithmetic operation is too large for the exponent field of the
destination format.
Bit 07 is the Underflow Sticky (US) bit. Bit 07 is set [1] when an exponent of a
rounded result of an arithmetic operation is too small to be represented in the
exponent field of the destination format.
Bit 06 is the Divide by Zero Sticky (QS) bit. Bit 06 is set [1] when the divisor is
normalized zero and the dividend is a finite nonzero number.
Bit 05 is the Partial Remainder (PR) bit. Bit 05 is set [1] when the result of a
remainder operation is a partial remainder. Bit 05 is cleared when the result of a
remainder operation is a full remainder. This bit is cleared on reset.
Bit 04 is the Unaligned Word (UW) bit. If enabled (bit 0), this bit is set [1] when a
fault condition occurs due to an unaligned word being received.
Bits 03-01 are used to determine which MAU is being used: 001 indicates a
WE 32206 MAU, 000 indicates a WE 32106 MAU.
Bit 00 is the Feature Enable (FE) bit. When set [1 ], the Write Fault (WF) and
Unaligned Word (UW) features of the MAU are enabled.
FUNCTIONAL DESCRIPTION 3-111