AT&T 3B2/300 Technical Reference Manual page 267

FUNCTIONAL D E S C R I P T I O N - - - - - - - - - - - - - - - - - - - - - - - - - - -
Input/Output Bus Structure
The system board CPU 1/0 bus consists of a 32-bit address bus, a 32-bit data bus, and a control
bus. The 1/0 bus as applied to the feature card slots is an asynchronous, nonmultiplexed bus
consisting of a 16-bit data, 24-bit address leads, and miscellaneous control and status leads. Figure 3-5
summarizes the 1/0 bus signals.
INPUT /OUTPUT BUS SIGNALS
NAME SIGNAL
SOURCE TYPE
PHYSICAL ADDRESS PPA23-00[l] BIDIRECTIONAL TRI-STATE
PHYSICAL ADDRESS STROBE
PPAS[O]
BIDIRECTIONAL
TRI-STATE
DATA PDlS-00[1] BIDIRECTIONAL TRI-STATE
DAT A STROBES PDSl-0[0] BIDIRECTIONAL TRI-STATE
READ/WRITE PR[l]W[O] BIDIRECTIONAL TRI-STATE
DATA ACKNOWLEDGE
PDTACK[O]
BIDIRECTIONAL
OPEN COLLECTOR
DATA WIDTH PSIZE16[0] FEATURE CARD OPEN COLLECTOR
FEATURE CARD FAILURE PFAIL[O] FEATURE CARD OPEN COLLECTOR
BUS FAULT
PFLT[O] BIDIRECTIONAL OPEN COLLECTOR
BUS REQUEST
PBRQ[O]
FEATURE CARD
OPEN COLLECTOR
BUS ACKNOWLEDGE PBACK[O] SYSTEM BOARD TOTEM POLE
BUS BUSY PBUSY[O] FEATURE CARD TRI-STATE
INTERRUPT REQUEST PINT2-0[0] FEATURE CARD OPEN COLLECTOR
INTERRUPT ACKNOWLEDGE PIAK2-0[0] SYSTEM BOARD TOTEM POLE
FEATURE CARD SELECT
PCS12-01[0] SYSTEM BOARD TOTEM POLE
SYSTEM RESET SYSRST[O] SYSTEM BOARD
TOTEM POLE
SYSTEM RESET REQUEST RQRST[O] FEATURE CARD OPEN COLLECTOR
+12V V12P SYSTEM BOARD POWER
-12V V12N
SYSTEM BOARD POWER
+sv
vcc SYSTEM BOARD POWER
BACKUP BATTERY VBKUP SYSTEM BOARD POWER
GROUND GRD SYSTEM BOARD GROUND
Figure 3-5: Input/Output Bus Signals
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