AT&T 3B2/300 Technical Reference Manual page 300

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Configuration Register
The Configuration Register (CR) is used by the operating system to determine whether or not the
Referenced
(R)
and Modified (M) bits for segment descriptors are to be updated in memory. The format
of the CR is as follows.
CONFIGURATION REGISTER
BITS
31 -03 02 01 00
FIELD RESERVED CACHEABLE REFERENCED MODIFIED
The CR fields are defined in the following paragraphs.
RESERVED
Bits 31-03 are reserved for future use. If read, zeros are returned.
CACHEABLE
Bit 02 is the Cacheable bit. The Cacheable ($) bit determines the state of CABLE
during misprocessing and updating of the Referenced and Modified bits. (If $=0,
then CABLE =1; if $=1,
then CABLE =0.)
REFERENCED Bit 01 is the Referenced (R) bit. The R bit in the segment descriptor is set (R=l)
when the segment descriptor is brought into the segment descriptor cache as a
result of misprocessing. When R=O, the R bit in the segment descriptor is not
updated.
MODIFIED
Bit 00 is the Modified (M) bit. If M=l, the segment descriptor M bit is updated
on the first write to a segment.
Virtual Address Register
The Virtual Address Register (VAR) contains the virtual address to be translated by the MMU. The
VAR is overwritten each time a translation is performed or when the CPU writes to it in the peripheral
mode.
FUNCTIONAL DESCRIPTION 3-47