AT&T 3B2/300 Technical Reference Manual page 474

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Local RAM
The XDC card contains 128K bytes of Dynamic Random Access Memory (DRAM) configured as 64K
by 16 bits. The DRAM is accessed via the Low Memory Chip Select (LCSO) from 80186
Microprocessor. The 16-bit address consists of the row address (bits 15-08) and the column address
(bits 07-00).
The DRAM refresh operations are interleaved with CPU read/write accesses. If a memory access is
in progress when the refresh timer requests a refresh operation, the memory refresh operation occurs
immediately following the access. If a memory refresh operation is in progress when the CPU attempts
a DRAM access, the memory refresh operation is allowed to complete before the CPU access is
permitted. The CPU access is suspended by a maximum of three wait states to allow for the
completion of the refresh cycle.
Local ROM
Firmware for the 80186 Microprocessor is stored in the ROM. The XDC card ROM contains
16K bytes configured as 8K by 16 bits. The ROM is accessed via the Upper Memory Chip Select
(UCS[O]) and address bits 14-00.
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