AT&T 3B2/300 Technical Reference Manual page 318

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Input/Output Chip Selects.
The address decoder enables 1 out of 15 Peripheral Chip Select (PCS)
signals (PCS15-0l[O]) from latched address bits 24 through 21 (LPA24[1] through LPA21[1 ]). For the
3B2/400 computer, only 12 peripheral chip selects (PCS12-01) are used. For the 3B2/300 and 310
computers, only 4 peripheral chip selects (PCS04-01) are used. The PCS15 through PCS13 signals are
reserved for future enhancements. PCSOO[O] is decoded but has no connection.
A composite input/output chip select signal (CREQ[O]) is sent to the Dual Port Dynamic RAM
(DPDRAM) Controller and Arbiter Circuits to request the "Bypass Mode" to access the input/ output
connectors (feature card slots). The Bypass Sequencer returns a Bypass Mode Acknowledge
(LCPUIO[O]) signal to enable the individual input/output card chip selects to be passed to the
input/output connectors. All inputs to the Address Decoder from off-board and DMA Subsystem
devices are latched under the control of the arbiter (LCPUIO signal).
Other Chip Selects.
Other chip selects are used to enable various devices on and off the system
board. The onboard devices chip selects decoded from physical address bits 15 through 12 are listed
below:
• Memory Management Unit Chip Select (MMUCS[O])
• Time-of-Day Chip Select (TODCS[O])
• Timer Chip Select (TIMRCS[O])
• Nonvolatile RAM Chip Select (NVRCS[O])
• Control and Status Register Chip Select (CSRCS[O])
• Page Register 1 Chip Select (PRlCS[O])
• Page Register 2 Chip Select (PR2CS[O])
• Page Register 3 Chip Select (PR3CS[O])
• Page Register 4 Chip Select (PR4CS[O])
• Direct Memory Access Chip Select (DMACS[O])
• DUART Chip Select (UARTCS[O])
• Hard Disk Controller Chip Select (DSKCS[O])
• Memory Size Chip Select (MSIZECS[O])
• Floppy Disk Controller Chip Select (FCS[O]).
Physical address bits 26-17 and 15, Physical Address Strobe (PAS[O]), and Interrupt Acknowledge
(IACK[O]) are combined to generate the following chip select and control signals:
• Read Only Memory Chip Select (ROMCS[O])
• Direct Memory Access Subsystem (DMASS[O])
• Miscellaneous Chip Select (MISCS[O])
• Input/Output Required (IOREQ[O]).
FUNCTIONAL DESCRIPTION 3-65