AT&T 3B2/300 Technical Reference Manual page 388

- - - - - - - - - - - - - - - - - - - - - - - - - - - FUNCTIONAL DESCRIPTION
Integral Floppy Disk Controller.
The integral Floppy Disk Controller provides data and access
control for a single floppy disk drive. The controller is a FD 1793-02 and provides the following:
• Single Frequency Modulation (FM) and Modified Frequency Modulation (MFM) density
• Automatic seek with verify
• Soft sector compatibility.
The controller resides on the DMA Subsystem data bus bits 07-00[1]. The chip is enabled by the
FCS[O] signal or the DMA acknowledge DACKl[O]. All floppy disk interface signals are terminated at
the receiving end by a resistor network of 150 ohms to VCC.
Floppy Controller Data Separator. The FDC 9229-BT data separator is used to separate the data
and clock signal from the data coming in from the floppy disk drive. The data separator includes the
following features:
• Digital data separator
• Separates FM and MFM encoded data
• No adjustments necessary
• Compatible for 5.25- and 8-inch floppy disks
• Variable write precompensation
• Internal oscillator circuit
• Track selectable write precompensation.
The data separator receives controls from the floppy controller and floppy controller register. The
floppy controller indicates when a write occurs and if precompensation should be performed. The
floppy controller register determines how much precompensation to perform.
The CSER is also involved in the data separator. Bits 21 and 22 select the density of the floppy
disk drive and the size of the floppy disk drive, respectively. These signals control the internal dividers
of the data separator. A 16-MHz clock signal is connected to the data separator and divided to create
the proper clock for the floppy controller. The separator generates the clock for the floppy controller
and the read clock for the incoming data.
Direct Memory Access Controller.
The integral Direct Memory Access Controller (DMAC) serves
the Dual Universal Asynchronous Receiver/Transmitter (DUART) and the integral Floppy Disk
Controller. The DMAC has four independent DMA channels. Each channel has separate registers for
mode control, current address, base address, current word count, and base word count.
The DMAC generates a 16-bit address. An additional 12-bit "page" register is used for three of the
four DMA channels (Channel O is not used) to provide DMA accessibility to the 26-bit Dynamic
Random Access Memory (DRAM). The most significant bit of each Page Register is the read/write bit.
FUNCTIONAL DESCRIPTION 3-135