Xilinx Virtex UltraScale+ FPGAs User Manual page 40

Table 18: RX Initialization and Reset Attributes (cont'd)
Attribute
CH[0/1]_RST_LP_CFG3
Bit Name
RX_PRBS_RESET_LOOP_ID
RX_PCS_RESET_LOOP_ID
RX_FEC_RESET_LOOP_ID
RX_EYESCAN_RESET_LOOP_ID
CH[0/1]_RST_LP_ID_CFG0
Bit Name
RX_PCS_LOOPER_END_ID
RX_PCS_LOOPER_START_ID
RX_PMA_LOOPER_END_ID
RX_PMA_LOOPER_START_ID
CH[0/1]_RST_LP_CFG4
Bit Name
BYP_HDSHK_RX_PCS_RESET_LOOP
BYP_HDSHK_TX_ADAPT_RESET_LOOP
GTM Transceiver RX Reset in Response to Completion
of Configuration
The RX reset sequence shown in
These conditions must be met:
1. RXRESETMODE must be set to sequential mode.
2. GTRXRESET must be used.
3. All RXPMARESETMASK and RXPCSRESETMASK bits should be set to High.
4. GTRXRESET cannot be driven Low until the associated PLL is locked.
5. Ensure that GTPOWERGOOD is High before releasing PLLRESET and GTRXRESET.
UG581 (v1.0) January 4, 2019
Virtex UltraScale+ GTM Transceivers
Type
16-bit Reserved. Use the recommended value from the
Wizard.
Bit Field Description
[15:12] Reserved. Use the recommended value from the
Wizard.
[11:8] Reserved. Use the recommended value from the
Wizard.
[7:4] Reserved. Use the recommended value from the
Wizard.
[3:0] Reserved. Use the recommended value from the
Wizard.
16-bit Reserved. Use the recommended value from the
Wizard.
Bit Field Description
[15:12] Reserved. Use the recommended value from the
Wizard.
[11:8] Reserved. Use the recommended value from the
Wizard.
[7:4] Reserved. Use the recommended value from the
Wizard.
[3:0] Reserved. Use the recommended value from the
Wizard.
16-bit Reserved. Use the recommended value from the
Wizard.
Bit Field Description
[4] Reserved. Use the recommended value from the
Wizard.
[1] Reserved. Use the recommended value from the
Wizard.
Figure 18 is not automatically started to follow global GSR.
Chapter 2: Shared Features
Description
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