Xilinx Virtex UltraScale+ FPGAs User Manual page 145

Copyright
© Copyright 2019 Xilinx, Inc. Xilinx, the Xilinx logo, Alveo, Artix, ISE, Kintex, Spartan, Versal,
Virtex, Vivado, Zynq, and other designated brands included herein are trademarks of Xilinx in the
United States and other countries. All other trademarks are the property of their respective
owners.
UG581 (v1.0) January 4, 2019
Virtex UltraScale+ GTM Transceivers
Appendix B: Additional Resources and Legal Notices
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