Rx Polarity Control - Xilinx Virtex UltraScale+ FPGAs User Manual

Ports and Attributes
The following table defines the attributes required for RX Gray Encoder control.
Table 58: Gray Encoder Attributes
Attribute
CH[0/1]_RX_PCS_CFG0
Bit Name
RX_GRAY_ENDIAN
RX_GRAY_BYP_EN
IMPORTANT! In PAM4 mode, if the Gray Encoder is enabled for the receiver, the transmitter Gray
Encoder should also be enabled for proper data recovery.

RX Polarity Control

If the RXP and RXN differential traces are accidentally swapped on the PCB, the differential data
received by the GTM RX is reversed. The GTM RX allows inversion to be done on parallel bytes
in the PCS after the SIPO to offset reversed polarity on the differential pair. The polarity control
function uses the CH0_RXPOLARITY and CH1_RXPOLARITY input, which is driven High from
the interconnect logic interface to invert polarity.
Ports and Attributes
The following table defines the ports required for RX polarity control.
UG581 (v1.0) January 4, 2019
Virtex UltraScale+ GTM Transceivers
Type
16-bit Reserved.
Address Description
[13] In PAM4 mode, this attribute controls the received
endianness. In NRZ mode, the default Wizard value
must be used.
1'b0: Non-inverting.
1'b1: Inverting.
[12] In PAM4 mode, this attribute enables Gray
encoding. In NRZ mode, the default Wizard value
must be used.
1'b0: Enables Gray encoding.
1'b1: Disables Gray encoding.
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Chapter 4: Receiver
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