Xilinx Virtex UltraScale+ FPGAs User Manual page 49

DRPCLK
DRPEN
DRPRDY
DRPWE
DRPADDR
DRPDI
DRPDO
Read Operation
The following figure shows the DRP read operation timing. New DRP operations can be initiated
when DRPY is asserted.
DRPCLK
DRPEN
DRPRDY
DRPWE
DRPADDR
DRPDI
DRPDO
UG581 (v1.0) January 4, 2019
Virtex UltraScale+ GTM Transceivers
DRP Write Timing
Figure 22:
ADR
DAT
DRP Read Timing
Figure 23:
ADR
Chapter 2: Shared Features
DAT
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