Xilinx Virtex UltraScale+ FPGAs User Manual page 42

Gtm transceivers
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GTM Transceiver RX Component Reset
GTM transceiver RX component resets can be reset individually in either sequential mode or
single mode. They are primarily used for special cases. These resets are needed when only a
specific subsection needs to be reset.
Driving GTRXRESET from High to Low starts the component reset process. All
RXPMARESETMASK and RXPCSRESETMASK bits along with RXRESETMODE must be held
constant during the rest process.
When RXRESETMODE is set to sequential mode, the internal resets are toggled in sequence
depending on the RXPMARESETMASK and RXPCSRESETMASK selection. When
RXRESETMODE is set to single mode, the internal resets are toggled simultaneously depending
on the RXPMARESETMASK and RXPCSRESETMASK selection.
In sequential mode, if the RX PCS is to be reset, RXUSERRDY must toggle High prior to the
internal PCS reset signal being released, allowing RX reset to be completed.
Direct single reset ports RXPMARESET RXADAPTRESET, RXADCCLKGENRESET,
RXCDRFRRESET, RXCDRPHRESET, RXDFERESET, RXDSPRESET, RXPCSRESET, RXBUFRESET,
RXEYESCANRESET, RXFECRESET, and RXPRBSCSCNTRST are available to perform single resets
of the respective RX components. When direct single reset ports are toggled, a single reset is
performed regardless of RXPMARESETMASK, RXPCSRESETMASK, and RXRESETMODE
selection. These ports must be held Low during any sequential or single rests driven by
GTRXRESET.
The table below lists the recommended receiver resets for common situations.
Table 19: Recommended Receiver Resets for Common Situations
Situation
After power up and
configuration
After turning on a reference
clock to the PLL being used
After changing the reference
clock to the PLL being used
After assertion/deassertion
of PLLPD for the PLL being
used
After assertion/deassertion
of RXPD
RX rate change
RX parallel clock source reset
After remote power up
UG581 (v1.0) January 4, 2019
Virtex UltraScale+ GTM Transceivers
Components
to be Reset
RXRESETMODE RXPMARESETMASK RXPCSRESETMASK
PLL, Entire RX
2'b00
PLL, Entire RX
2'b00
PLL, Entire RX
2'b00
PLL, Entire RX
2'b00
Entire RX
2'b00
RX PMA and RX
2'b00
PCS
RX PCS
2'b00
Entire RX
2'b00
Chapter 2: Shared Features
Recommended RX Reset Setting
8'b11111111
8'b11111111
8'b11111111
8'b11111111
8'b11111111
8'b11111111
8'b00000000
8'b11111111
Send Feedback
1
4'b1111
4'b1111
4'b1111
4'b1111
4'b1111
4'b1111
4'b1111
4'b1111
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