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Table 46: TX Configurable Driver Ports (cont'd)
Port
CH[0/1]_TXEMPPOST[4:0]
CH[0/1]_GTMTXP
CH[0/1]_GTMTXN
CH[0/1]_TXCTLFIRDAT[5:0]
CH[0/1]_TXMUXDCDEXHOLD
UG581 (v1.0) January 4, 2019
Virtex UltraScale+ GTM Transceivers
Clock
Dir
Domain
Input
Async
Transmitter post-cursor TX pre-emphasis control for channel 0.
The default is user specified. All listed values (dB) are typical.
5'b00000
5'b00001
5'b00010
5'b00011
5'b00100
5'b00101
5'b00110
5'b00111
5'b01000
5'b01001
5'b01010
5'b01011
5'b01100
5'b01101
5'b01110
5'b01111
5'b10000
5'b10001
5'b10010
5'b10011
5'b10100
5'b10101
5'b10110
5'b10111
5'b11000
5'b11001
5'b11010
Notes:
1.
Output
TX Serial Clock Differential complements of one another forming a differential
(pad)
transmit output pair. These ports represent the pads. The
locations of these ports must be constrained (see
Implementation) and brought to the top of the design.
Input
Async
Reserved. Use the recommended value from the Wizard
Input
Async
Reserved. Use the recommended value from the Wizard.
Description
[4:0]
dB (PAM4)
0.0
–0.3
–0.7
–1.1
–1.5
–1.9
–2.3
–2.7
–3.2
–3.7
–4.2
–4.8
–5.4
–6.0
–6.7
–7.5
–8.3
–9.2
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
The peak-to-peak differential voltage is defined when
TXEMPPRE = 5'b00000, and TXEMPPRE2 = 4'b0000.
Emphasis = 20log10(V
/V
) = |20log10(V
high
low
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Chapter 3: Transmitter
dB (NRZ)
Coefficient
Units
0.0
0
–0.2
1
–0.5
2
–0.7
3
–0.9
4
–1.2
5
–1.5
6
–1.7
7
–2.0
8
–2.3
9
–2.6
10
–2.9
11
–3.2
12
–3.5
13
–3.9
14
–4.2
15
–4.6
16
–5.0
17
–5.4
18
–5.8
19
–6.2
20
–6.7
21
–7.2
22
–7.7
23
–8.3
24
–8.9
25
–9.2
26
/V
)|.
low
high
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