Xilinx Virtex UltraScale+ FPGAs User Manual page 27

TX Initialization and Reset
The GTM transceiver TX uses a reset state machine to control the reset process. The GTM
transceiver TX is partitioned into two reset regions, TX PMA and TX PCS. The partition allows TX
initialization and reset to be operated only in sequential mode, as shown in the figure below.
The initializing TX must use GTTXRESET in sequential mode. Activating the GTTXRESET input
can automatically trigger a full asynchronous TX reset. The reset state machine executes the
reset sequence, as shown in the figure below, covering the whole TX PMA and TX PCS. During
normal operation, when needed, sequential mode allows you to reset the TX from activating
TXPMARESET and continue the reset state machine until TXRESETDONE transitions from Low
to High.
The TX reset state machine does not reset the PCS until TXUSERRDY is detected High. Drive
TXUSERRDY High after all clocks used by the application including TXUSRCLK are shown as
stable.
Figure 13:
GTTXRESET
High
Wait until
GTTXRESET from
High to Low
TXPMARESETMASK[0]
= 1?
No
TXPMARESETMASK[1]
= 1?
No
Wait for TXUSERRDY
= 1
UG581 (v1.0) January 4, 2019
Virtex UltraScale+ GTM Transceivers
GTM Transceiver TX Reset State Machine Sequence
Yes
TX CKCAL Reset
Yes
TX PMA Top Reset
Chapter 2: Shared Features
Yes
TXPCSRESETMASK[0]
= 1?
No
Yes
TXPCSRESETMASK[1]
= 1?
No
TXRESETDONE High
Send Feedback
TX FEC Reset
TX PCS Top Reset
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