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1
A
J15
MH1
7
MH2
2
MH3
9
MH4
4
5
6
Y1_N1
3
Y2_N1
8
1
Y2_P1
CHASSIS
B
12
11
10
13
14
15
16
17
18
19
G3168-05000202-00
FBMH3216HM501NT
C
D
1
068070000 Rev A
2
3.3V
FB15
FBMH3216HM501NT
J13
1
0
R49
Y0_P1
2
3
0
R50
Y0_N1
4
Y1_P1
5
0
R51
6
0
R52
7
8
0
R53
9
0
R54
10
0
R55
CLKOUT_N1
11
12
0
R56
CLKOUT_P1
13
14
HEADER-7X2
3.3V
FB18
3.3V
C62
0.1
Vcc PIN 28
Vcc PIN 36
Vcc PIN 42
Vcc PIN 48
C46
C49
C47
C50
C48
C51
C53
22uF/6.3V
JMK316BJ226KL
0.1
0.1
0.1
0.01
0.01
0.01
2
3
4
TOUCH SCREEN INTERFACE CIRCUITRY ( TBD)
C61
0.1
Y0_P
Y0_N
Y1_P
Y1_N
Y2_N
Y2_P
bDCLK
CLKOUT_N
CLKOUT_P
R40
R43
R41
R42
R44
100
100
100
100
10K
FB6
FB14
C52
C54
C55
C56
C57
C58
0.1
0.01
0.1
0.01
0.1
0.01
3
4
5
U6
9
24
Y0P
D0
8
26
Y0M
D1
11
27
Y1P
D2
10
29
Y1M
D3
14
30
Y2M
D4
15
31
Y2P
D5
33
D6
23
34
CLKOUT
D7
16
35
CLKINM
D8
17
37
CLKINP
D9
39
D10
22
40
SHTDN
D11
41
6
D12
NC
43
D13
45
28
D14
VCC
46
36
D15
VCC
47
42
D16
VCC
1
48
D17
VCC
2
D18
12
4
LVDS/VCC
D19
20
5
PLLVCC
D20
7
LVDSGND
3
NOTE:
13
GND
LVDSGND
25
To receive backlight control (BACKL) from CPU board
18
GND
LVDSGND
32
when using ICOP_0096 LVDS Transmitter.
GND
19
38
The connection from pin 42 on the TTL video connector
PLLGND
GND
21
44
(VSYNC) to U1-23 must be broken and connected to
PLLGND
GND
pin 43.
SN75LVDS86A
Title
Size
Number
B
Date:
6/24/2010
File:
N:\PCBMGR\..\06696.P4.R3.schdoc
5
6
A
aR2
aR3
aR4
aR5
aR6
aR7
B
aG2
aG3
aG4
aG5
aG6
aG7
aB2
aB3
aB4
aB5
aB6
aB7
BACKL
aData Enable
C
D
GUI Interface
Revision
06698
D
Sheet of
4
4
Drawn By:
RT
6
D-30
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