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1
D
J1004
1
2
3
EXTERNAL
4
CONTROL
5
IN
6
A
7
8
9
10
TERMBLOCK-10
C
B
J1006
1
EXTERNAL
2
CONTROL
3
IN
4
B
5
6
7
8
9
10
A
TERMBLOCK-10
1
068070000 Rev A
2
3
CONTROL INPUTS
RN3
470x8
L19
L20
L21
L22 FE BEAD
L8
L9
10000 pF
EXT_+5V_OUT
10000 pF
L23
L24
L26
L25 FE BEAD
10000 pF
10000 pF
RN1
330x4
L28
L29
L30
L27
L11
L10
FE BEAD
10000 pF
EXT_+5V_OUT
10000 pF
2
3
4
U12
PS2702-4
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
U13
PS2702-4
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
VCC
U15
PS2702-4
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
4
5
VCC
TP7
RN2
U11
15Kx8
1
G1
19
G2
2
18
D0
A1
Y1
3
17
D1
A2
Y2
4
16
D2
A3
Y3
5
15
D3
A4
Y4
6
14
D4
A5
Y5
7
13
D5
A6
Y6
8
12
D6
A7
Y7
9
11
D7
A8
Y8
74HC541
R27
R28
R29
R31
R32
R26
R30
100
100
100
100
100
100
100
330 pF, 50V
330 pF, 50V
Place these termination resistors at the end of each data
line. Each data line
should be laid out as a daisy-chain, the signal passing
from one IC to the next.
RN4
U14
15Kx8
1
G1
19
IOR
G2
2
18
D0
A1
Y1
3
17
D1
A2
Y2
4
16
D2
A3
Y3
5
15
D3
A4
Y4
6
14
D4
A5
Y5
7
13
D5
A6
Y6
8
12
D6
A7
Y7
9
11
D7
A8
Y8
D[0..7]
74HC541
Title
Schematic for T Series G5 Motherboard PCA PN 05802
Size
Number
05803
Orcad B
Date:
11-May-2009
File:
N:\PCBMGR\05801RJ-E-series Motherboard Generation 5\Source\05801b.ddb
5
6
D
DIGIO0
IOR
D[0..7]
R33
C
100
330 pF, 50V
330 pF, 50V
B
DIGIO4
A
Revision
B
Sheet of
6
8
Drawn By:
6
D-24
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