Block Diagram Of The T1/E1 Frame Generator With Clock Bypass - Symmetricom TSG-3800 Series User Manual

CPU, Frame Generator, and Clock Modules
T1/E1 Frame Generator Module with Clock Bypass
Figure 6-10. Block Diagram of the T1/E1 Frame Generator with Clock Bypass
The module provides a Clock Bypass function that is not found in the other Frame
Generator modules. When a DS1 or E1 signal is connected to either Input module
port 1.1 (PRI) or Input module port 2.1 (SEC), the Frame Generator module
continues to function while both Clock modules are in warm-up or are removed. The
module accomplishes this by using the recovered clock from the input signal to
generate the reference it requires. This function is automatically selected when
there is no reference from the Clock modules, and is deselected when one or both
Clock modules begin normal operation. While Clock Bypass is active, the stability of
the selected reference determines the stability of the signals generated by the
196 TSG-3800 User's Guide
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12778474-002-2 Revision F – March 2004