Working With Arm Exceptions - Digi NS7520B-1-C36 Hardware Reference Manual

The ARM instruction set yields a 0.9 Dhrystone (2.1) rating MIPS/MHz of instruction
executions; the Thumb instruction set yields 0.75 Dhrystones MIPS/MHz. The MHz
rating reflects the rate at which instructions can be fetched from external flash
memory, as shown in this table:
System bus
size Code style
Thumb mode
16-bit Thumb
16-bit Thumb
16-bit Thumb
16-bit Thumb
16-bit Thumb
ARM mode
32-bit ARM
32-bit ARM
32-bit ARM
Table 16: ARM performance

Working with ARM exceptions

Exceptions occur when the normal flow of a program is halted temporarily; for
example, to service an interrupt from a peripheral. Each ARM exception causes the
ARM processor to save some state information, then jump to a location in low
memory (referred to as the vector table; see "Exception vector table" on page 33).
Before an exception can be handled, the current processor state must be preserved
so the original program can resume when the handler routine has finished.
System bus
RISC speed speed
25 MHz 25 MHz
25 MHz 25 MHz
36 MHz 36 MHz
46 MHz 46 MHz
55 MHz 55 MHz
36 MHz 36 MHz
46 MHz 46 MHz
55 MHz 55 MHz
W o r k i n g w i t h t h e C P U
Wait Instruction
states cycle time
1 120 ns
0 80 ns
3 125 ns
4 109 ns
5 108 ns
3 125 ns
4 109 ns
5 108 ns
w w w . d i g i e m b e d d e d . c o m
Dhrystone
rating
N/A
N/A
N/A
N/A
N/A
6.8
8.6
10.4
3 1