Digi NS7520B-1-C36 Hardware Reference Manual page 105

31 30 29 28
15 14 13 12
BASE
Bits Access Mnemonic
D31:12 R/W BASE
D11:10 R/W PGSIZE
Table 37: Chip Select Base Address register bit definition
27 26 25 24 23
BASE
11 10 9 8 7
DMUX
PGSIZE DMODE
S
Reset Description
0 Base address
Determines the physical base address of the
memory peripheral chip select. This 20-bit field
represents the 20 most significant bits of the
physical address.
To derive the BASE field from a 32-bit physical
address, remove the three least significant digits;
for example, for a physical address of
'h00200000
When accessing a static memory device, the
maximum value of the base address is
0x03000000
See "Setting the chip select address range" on
page 88 for more information.
0 Peripheral page size
Defines the page size for the attached peripheral
with this equation:
2
The NS7520 halts a burst at the address
boundary defined by the PGSIZE field. This
field must be set to
the chip select.
w w w . d i g i e m b e d d e d . c o m
M e m o r y C o n t r o l l e r M o d u l e
22 21 20 19
6 5 4 3
DMUX DR
EXTTA IDLE
M SEL
, the BASE field is set to
.
(6–PGSIZE)
for 32-bit operation of
'b00
18 17 16
2 1 0
BURST WP V
.
'h00200
9 3