Dma Controller Reset - Digi NS7520B-1-C36 Hardware Reference Manual

D M A c o n t r o l l e r r e s e t
NS7520
DREQ_
DACK_
DONE_
R/W_
DATA[31:0]
ADDR[27:0]
CSx_
CSx_
Memory
CS_
ADDR[X:0]
DATA{ 31:0]
R/W_
Figure 20: Hardware needed for external memory-to-memory DMA transfers
If the source buffer pointer points to the external device, the device, in
conjunction with appropriate memory device timing or external bus cycle
timing, provides data when DACK_ is asserted.
If the destination buffer pointer points to the external device, the device,
in conjunction with appropriate memory device timing or external bus cycle
timing, accepts data when DACK_ is asserted.
TEA_ indicates the existence and termination of burst cycles.

DMA controller reset

You can simultaneously reset the DMA controllers for channels 1-13 without affecting
any NS7520 modules. Just set the DMA reset bit in the GEN module System Control
register to 1 and then back to 0 (see "DMARST" on page 66).
All DMA controllers are reset by all forms of hardware and software resets.
1 4 8
N S 7 5 2 0 H a r d w a r e R e f e r e n c e , R e v G 9 / 2 0 0 7
External device
DREQ_
Enable
DONE
Direction
DATA[31:0]
ADDR[27:0]
CS